? semiconductor components industries, llc, 2013 may, 2013 ? rev. 0 1 publication order number: nvljd4007nz/d nvljd4007nz small signal mosfet 30 v, 245 ma, dual, n ? channel, gate esd protection, 2x2 wdfn package features ? optimized layout for excellent high speed signal integrity ? low gate charge for fast switching ? small 2 x 2 mm footprint ? esd protected gate ? aec ? q101 qualified and ppap capable ? these devices are pb ? free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain ? to ? source voltage v dss 30 v gate ? to ? source voltage v gs 10 v continuous drain current (note 1) steady state = 25 c i d 245 ma power dissipation (note 1) steady state = 25 c p d 755 mw pulsed drain current t p 10 s i dm 1.2 a operating junction and storage temperature t j , t stg ? 55 to 150 c continuous source current (body diode) i sd 245 ma lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. thermal resistance ratings parameter symbol max unit junction ? to ? ambient ? steady state (note 1) r ja 166 c/w 1. surface ? mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces). 2.3 @ 2.5 v r ds(on) typ @ v gs i d max (note 1) v (br)dss 1.4 @ 4.5 v 30 v 245 ma g (2) d (6) s (1) n ? channel http://onsemi.com jg = specific device code m = date code = pb ? free package jg 1 2 3 6 5 4 wdfn6 case 506an marking diagram 1 2 3 6 5 4 s1 g1 s2 d1 g2 d2 (top view) 1 pin connections d1 d2 device package shipping ? ordering information nvljd4007nztag wdfn6 (pb ? free) 3000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. (note: microdot may be in either location) NVLJD4007NZTBG wdfn6 (pb ? free) 3000/tape & reel g (5) d (4) s (3) n ? channel
nvljd4007nz http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 100 a 30 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j reference to 25 c, i d = 100 a 27 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 30 v 1.0 a zero gate voltage drain current i dss v gs = 0 v, v ds = 20 v, t = 85 c 1.0 a gate ? to ? source leakage current i gss v ds = 0 v, v gs = 10 v 25 a gate ? to ? source leakage current i gss v ds = 0 v, v gs = 5 v 1.0 a gate ? to ? source leakage current i gss v ds = 0 v, v gs = 5 v t = 85 c 1.0 a on characteristics (note 2) gate threshold voltage v gs(th) v ds = v gs , i d = 100 a 0.5 1.0 1.5 v threshold temperature coefficient v gs(th) /t j reference to 25 c, i d = 100 a ? 2.5 mv/ c drain ? to ? source on resistance r ds(on) v gs = 4.5 v, i d = 125 ma 1.4 7.0 v gs = 2.5 v, i d = 125 ma 2.3 7.5 forward transconductance g fs v ds = 3 v, i d = 125 ma 80 ms capacitances & gate charge input capacitance c iss v ds = 5.0 v, f = 1 mhz, v gs = 0 v 12.2 20 pf output capacitance c oss 10 15 reverse transfer capacitance c rss 3.3 6.0 total gate charge q g v ds = 24 v, i d = 100 ma, v gs = 4.5 v 0.75 nc gate ? to ? source charge q gs 0.20 gate ? to ? drain charge q gd 0.20 plateau voltage v gp 1.57 v switching characteristics (note 3) turn ? on delay time t d(on) v gs = 4.5 v, v ds = 24 v, i d = 125 ma, r g = 10 9 ns rise time t r 41 ns turn ? off delay time t d(off) 96 fall time t f 72 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 125 ma 0.79 0.9 v 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
nvljd4007nz http://onsemi.com 3 typical performance curves t j = 150 c 0 0.9 4.0 0.5 v ds , drain ? to ? source voltage (v) i d, drain current (a) 0.7 0.2 0 figure 1. on ? region characteristics 0 2.0 4.0 figure 2. transfer characteristics v gs , gate ? to ? source voltage (v) 1.0 8.0 figure 3. on ? resistance vs. gate ? to ? source voltage v gs, gate voltage (v) r ds(on), drain ? to ? source resistance ( ) i d, drain current (a) figure 4. on ? resistance vs. drain current and gate voltage ? 50 0 ? 25 25 1.2 0.7 0.6 50 150 figure 5. on ? resistance variation with temperature t j , junction temperature ( c) 2.0 t j = ? 55 c 75 i d = 125 ma v gs = 4.5 v r ds(on), drain ? to ? source resistance (normalized) t j = 25 c r ds(on), drain ? to ? source resistance ( ) 1.3 v gs = 2.5 v v gs = 4.5 v 1.5 3.5 0.1 25 figure 6. drain ? to ? source leakage current vs. voltage v ds , drain ? to ? source voltage (v) 15 i dss , leakage (na) t j = 150 c t j = 125 c 10 100 v ds = 5 v 20 2.0 v 0.5 1.8 v 3.0 30 1.2 1.0 v gs = 10 v 10 125 100 0 5.0 10 5 3.0 1.5 1.5 5.0 4.5 t j = 25 c i d = 125 ma i d, drain current (a) 1.9 1000 2.4 v 3.5 1.0 1.0 8.0 0.1 0 0.7 0.5 10 4.0 1.2 0.8 1.4 0.9 1.6 1.1 1.8 0.8 0.6 0.1 0.3 0.9 0.6 0.1 0 0.4 1.2 0.5 3.0 0.4 1.1 1.0 2.0 2.5 3.5 4.5 2.2 v 2.8 v 2.6 v 3.0 v 3.5 v 4.0 v 5.0 v 4.5 v 2.5 4.5 0.2 0.3 0.5 0.7 0.8 1.0 1.1 2.5 4.0 2.0 3.0 4.0 6.0 7.0 9.0 0.2 0.3 0.4 0.6 0.8 0.9 1.0 1.1 2.0 3.0 5.0 6.0 7.0 9.0 t j = 125 c t j = ? 55 c t j = 25 c t j = 125 c t j = 25 c t j = ? 55 c 1.0 1.5 1.7 t j = 85 c 1
nvljd4007nz http://onsemi.com 4 typical performance curves figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge v ds , drain ? to ? source voltage (v) c, capacitance (pf) 5 0101520 5 v gs = 0 v t j = 25 c f = 1 mhz c iss c oss c rss 25 0 20 q g , total gate charge (nc) 0 0.1 0.8 3.0 1.0 v ds = 24 v i d = 100 ma t j = 25 c 5.0 0 25 10 15 30 0.2 0.3 0.4 0.5 0.6 0.7 0.5 2.0 1.5 2.5 4.0 3.5 4.5 v gs , gate ? to ? source voltage (v) v ds , drain ? to ? source voltage (v) 0 5 10 15 20 25 30 q t q gs q gd v gs v ds figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) v sd , source ? to ? drain voltage (v) 100 10 1 1 10 100 1000 1.0 0.9 0.8 1.1 0.7 0.6 0.5 0.1 1 10 figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (v) 100 10 1 0.1 0.001 0.01 0.1 1 10 t, time (ns) i s , source current (a) i d , drain current (a) v gs = 4.5 v v dd = 24 v i d = 125 ma t d(off) t d(on) t f t r t j = 125 c t j = 25 c t j = ? 55 c t j = 150 c t j = 85 c v gs 10 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 10 s 100 s 1 ms 10 ms dc
nvljd4007nz http://onsemi.com 5 typical performance curves figure 12. thermal impedance (junction ? to ? ambient) t, time (s) 1e ? 06 1 10 100 1000 r(t), effective transient thermal response 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+03 single pulse 0.01 0.02 0.05 0.10 0.20 duty cycle = 0.5 r ja steady state = 166 c/w
nvljd4007nz http://onsemi.com 6 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. seating plane d e 0.10 c a3 a a1 0.10 c wdfn6 2x2, 0.65p case 506an issue f dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.25 0.35 d 2.00 bsc d2 0.57 0.77 0.90 1.10 e 2.00 bsc 0.25 ref e2 e 0.65 bsc k 0.20 0.30 l 0.15 bsc f pin one reference 0.08 c 0.10 c note 4 a 0.10 c note 3 l e d2 e2 b b 3 6 6x 1 k 4 0.05 c d2 f mounting footprint bottom view soldermask defined dimensions: millimeters l1 detail a l optional constructions ?? ?? ??? --- 0.10 l1 a 0.10 cb a 0.10 cb 6x 0.47 2.30 1.10 0.77 2x 1.74 0.65 pitch 6x 0.35 1 package outline style 3: pin 1. source 1 2. gate 1 3. source 2 4. drain 2 5. gate 2 6. drain 1 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 nvljd4007nz/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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